Randall Geiger
Email: rlgeiger@iastate.edu
Phone: 515-294-7745
Title(s):
Tunc and Lale Doluca Professor in Electrical and Computer Engineering
Office
2133 Coover2520 Osborn Dr.
Ames, IA 500111046
Information
Education:
Ph.D., Electrical Engineering, Colorado State University (1977)
M.S., Mathematics, University of Nebraska (1973)
B.S., Electrical Engineering, University of Nebraska (1972)
Research Areas:
Core Area(s): VLSI, secure and reliable computing, analog VLSI design, VLSI testing, high-speed data converters
Department’s Strategic Area(s): Materials, devices, & circuits; cyber infrastructure
Publications
Google Scholar Profile: https://scholar.google.com/citations?user=f-GCFyQAAAAJ&hl=en
- Jin, L., D. Chen, and R. L. Geiger. SEIR Linearity Testing of Precision A/D Converters in Non-stationary Environments with Center-Symmetric Interleaving. IEEE Transactions on Instruction and Measurement, October 2007, 1776-1785. Jiang, H., B. Olleta, D. J. Chen, and R. L. Geiger. Testing High- Resolution ADCs with Low-Resolution/Accuracy Deterministic Dynamic Element Matched DACs. IEEE Transactions on Circuits and Systems I, May 2007, 964-973.
- Oletta, B., H. Jiang, D. J. Chen, and R. L. Geiger. A Deterministic Dyanmic Element Mating Approach for Testing High-Resolution ADCs with Low Accuracy Excitations. IEEE Transactions on Instruction and Measurement 55, no. 3, (June 2006): 902-915.
- Lin, Y., D. Chen, and R. L. Geiger. Yield Enhancement with Optimal Area Allocation for Radio-Critical Analog Circuits. IEEE Transactions on Circuits and Systems 53, (March 2006): 534-553.
Cong and R. L. Geiger. A 1.5v 14-bit 100-MS/s Self-Calibrated DAC. IEEE Journal of Solid State Circuits 38, no. 12, (December 2003): 2051-2060.
Departments
Affiliations
Interests
Analog and mixed-signal testing and BISTAnalog Hardware TrojansCyber SecurityData Converter Design and TestingReliability and yield enhancement of semiconductor devicesTemperature sensors and voltage references